1. Field of the Invention
The present invention relates to a magnetic random access memory (MRAM) using, as a memory cell, a structure which reads out “1” or “0” information by using a magnetoresistive effect.
2. Description of the Related Art
As an information memory element, a memory cell of a magnetic random access memory (MRAM) which uses a tunneling magnetoresistive effect (to be referred to as TMR hereinafter) is disclosed in, e.g., Roy Scheuerlein et al., “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC 2000 Technical Digest, p. 128.
In a magnetic tunnel junction (MTJ) element with TMR, an insulating film is sandwiched between two magnetic thin films. The MTJ element has two states, i.e., a state wherein the magnetized directions of the upper and lower magnetic materials are parallel and a state in which the magnetized directions are anti-parallel.
When the magnetized directions of the upper and lower magnetic materials are parallel to each other, the tunnel resistance by the electric current flowing through the thin insulating film sandwiched between the magnetic materials is lowest. In this state, for example, it is recognized that “1” is stored by the read-out current. On the other hand, when the magnetized directions of the upper and lower magnetic materials are anti-parallel to each other, the tunnel resistance is highest. In this state, for example, it is recognized that “0” is stored by the read-out current.
In this example, 1-bit data is stored in two cells. That is, 1-bit data is stored in two MOS transistors+two MTJ elements as complementary values. In the read, a current is supplied from a current load to two cells, and the difference current is amplified. Data is determined depending on which read current is larger in the two cells.
In the above example, no specific current load circuit form is presented. In, e.g., Peter K. Naji, et al., “A 256 kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM”, ISSCC 2001 Technical Digest, p. 122, FIGS. 7.6.4., a MOS circuit is used as a current conveyor as an example of the current load. As a memory to read the magnitude of a current, for example, a flash memory is used. Even in this case, a MOS circuit is used as the current load.
The ratio of the resistance value of the current load to the resistance of an MTJ element, which increases the signal difference, will be examined.
FIG. 9 is a schematic view of a magnetic random access memory according to a prior art. As shown in FIG. 9, let R be the resistance of an MTJ element, m be the MR ratio, L be the resistance value of the current load, and I be the bias current of the current load. The input voltage of the sense amplifier equals the divided voltage of the resistance R of the MTJ element and the resistance L of the current load. Assume that complementary data are written in two cells according to Roy Scheuerlein et al. Parasitic resistances existed in the read-out current paths make the difference voltage between the two cells decrease. Hence, the resistance of a select MOS transistor is designed to be negligible with respect to the resistance R of the MTJ element. Then, a difference voltage Vs between the two cells is given byVs=I×[R·(1+m)/{L+R·(1+m)}−R/(L+R)]  (1)
In equation (1), L/R=r is set, and dVs/dr is calculated to obtain the maximum value of Vs. Consequently, we obtainVs=I×m×r/{(1+r)×(1+m+r)}  (2)dVs/dr=I×m×(1+m−r2)/{(1+r)2×(1+m+r)2}  (3)
Since m and r are positive, Vs takes the maximum value when r=√{square root over ( )} (1+m). In an MTJ element using a metal ferromagnetic material, m is about 0.2 to 0.4. For this reason, r is about 1. That is, the resistance value L of the current load preferably almost equals the resistance R of the MTJ element.
As can be estimated easily, no signal difference is generated when the resistance of the MOS transistor serving as the current load for the two cells shifts by about m. To avoid any manufacturing variation, the channel length and channel width of the MOS transistor are set to be relatively large. In addition, a plurality of MOS transistors are used in parallel. Hence, the layout area of the current load circuit becomes large.
The manufacturing step of the MTJ element and that of the MOS transistor are different. For this reason, the manufacturing variation can be regarded as an independent event. More specifically, the channel width of the MOS transistor is determined in the step of forming an active area on the surface of a silicon substrate. The channel width is determined in the step of forming a gate electrode. Important steps to determine the characteristic of the MOS transistor also include a step of forming a gate insulating film and a step of doping a channel impurity. Important steps to determine the resistance value of the MTJ element include a step of forming the tunnel insulating film of the MTJ element and a step of separating MTJ elements for respective cells. That is, the manufacturing variation of the resistance value of the MTJ element and that of the resistance value of the MOS transistor have no relevance. Hence, the ratio of the resistance value of the MTJ element to that of the MOS transistor may greatly deviate from 1 without careful manufacturing.
As described above, in the prior art, it is difficult to make the resistance value of the MTJ element almost equal to that of the MOS transistor, resulting in adverse effect on the read characteristic.